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Use in-the-loop gain control to extend dynamic range
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By
Loren Siebert, National Semiconductor Corporation
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Page 1 of 3
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RF Designline
(09/24/2007 1:14 AM EDT)
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Modern communications systems are demanding more dynamic range than current analog-to-digital converters (ADCs) can support. One way to gain system dynamic range is to use a digitally-controlled variable gain amplifier (DVGA) with a high-speed, high-resolution ADC in a digitally-controlled AGC loop.
System design with high performance components is very demanding. Different components require different operating environments to perform to potential. Amplifiers and data converters have different input and output requirements, and often require different power supplies. How the components are positioned on the circuit board, and how they are positioned with respect to each other is critical as well.
This article details the use of a digitally controlled variable gain amplifier (DVGA) and a high speed sub-sampling ADC in a typical intermediate frequency (IF) radio base-station application.
The information about what gain setting the amplifier is programmed to is combined with the voltage measured by the data converter to get a final value (Gain + measured voltage = true voltage). Because the gain can be lowered, signals that would ordinarily clip the ADC input can be attenuated and measured. The DVGA is controlled in real time by the digital circuit and the gain can change in response to the modulation of the incoming signal. This feature is particularly important for modulation schemes that have a high peak-to-average ratio like GSM EDGE/EGPRS.
Click for larger image 1. ADC14155 and LMH6515. ADC Clock Frequency = 150 MHz, Signal Frequency = 180 MHz. Signal = -1 dBFS. Noise Floor = -66 + -1 = -67 dBFS
To get the best increase in dynamic range the smallest expected signals should be processed with the maximum gain setting but signal bursts must not be allowed to clip the ADC. For this reason it is important to tune the AGC loop to scale back the signal well below the ADC full scale. It also is best to have an AGC loop controller that is fast enough to scale the gain during signal bursts. Adjacent channel and blocker channel interference must be factored into the dynamic range calculation. The combined level of the desired signal as well as any interfering signals must be kept below the level that would produce clipping at the ADC input.
As shown in Figure 1, the signal-to-noise ratio (SNR) and spurious free dynamic range (SFDR) is achieved with near full scale input signals. In Figure 2, the same amplifier/ADC setup is shown with a lower amplitude signal. With a 16-dB decrease in signal amplitude the SNR drops 12 dB and the SFDR improves by 5 dB. This shows that there is a range of input amplitudes that will provide good signal fidelity and the purpose of the automatic gain control (AGC) to keep the input signal in this range as much as possible. For many ADCs the range of -6 dBFS to -18 dBFS is the best range for optimum operation.
Click for larger image
2. ADC14155 and LMH6515. ADC Clock Frequency = 150MHz, Signal Frequency = 180MHz. Signal = -17dBFS. Noise Floor = -53 + -18 = -71 dBFS.
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